1/9 october 2001 std35nf06 n-channel 60v - 0.018 w - 35a dpak stripfet?ii mosfet (1)i sd 35a, di/dt 100a/s, v dd v (br)dss , t j t jmax. internal schematic diagram n typical r ds (on) = 0.018 w n extremely high dv/dt capability n 100% avalanche tested n gate charge minimized description this power mosfet is the latest development of st- microelectronics unique single feature size? strip-based process. the resulting transistor shows extremely high packing density for low on-resis- tance, rugged avalance characteristics and less crit- ical alignment steps therefore a remarkable manufacturing reproducibility. applications n solenoid and relay drivers n motor control, audio amplifiers n dc-ac converters n automotive environment absolute maximum ratings (?)pulse width limited by safe operating area type v dss r ds(on) i d std35nf06 60 v < 0.024 w 35 a symbol parameter value unit v ds drain-source voltage (v gs = 0) 60 v v dgr drain-gate voltage (r gs = 20 k w ) 60 v v gs gate- source voltage 20 v i d drain current (continuos) at t c = 25c 35 a i d drain current (continuos) at t c = 100c 24.5 a i dm ( l ) drain current (pulsed) 140 a p tot total dissipation at t c = 25c 55 w derating factor 0.37 w/c dv/dt (1) peak diode recovery voltage slope 5 v/ns t stg storage temperature C55 to 175 c t j max. operating junction temperature dpak 1 3
std35nf06 2/9 thermal data avalanche characteristics electrical characteristics (tcase = 25 c unless otherwise specified) off on (1) dynamic rthj-case thermal resistance junction-case max 2.7 c/w rthj-amb thermal resistance junction-ambient max 100 c/w t l maximum lead temperature for soldering purpose 275 c symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 17.5 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 50 v) 130 mj symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 60 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating 1a v ds = max rating, t c = 125 c 10 a i gss gate-body leakage current (v ds = 0) v gs = 20v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs , i d = 250a 234v r ds(on) static drain-source on resistance v gs = 10v, i d = 17.5 a 0.018 0.024 w symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds > i d(on) x r ds(on)max, i d = 17.5 a 13 s c iss input capacitance v ds = 25v, f = 1 mhz, v gs = 0 1530 pf c oss output capacitance 300 pf c rss reverse transfer capacitance 105 pf
3/9 std35nf06 electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 30 v, i d = 27.5 a r g = 4.7 w v gs = 10 v (see test circuit, figure 3) 16 ns t r rise time 8 ns q g total gate charge v dd = 48v, i d = 55 a, v gs = 10v 44.5 60 nc q gs gate-source charge 10.5 nc q gd gate-drain charge 17.5 nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off-delay time fall time v dd = 30v, i d = 27.5a, r g =4.7 w, v gs = 10v (see test circuit, figure 3) 36 15 ns ns symbol parameter test conditions min. typ. max. unit i sd source-drain current 35 a i sdm (2) source-drain current (pulsed) 140 a v sd (1) forward on voltage i sd = 35 a, v gs = 0 1.5 v t rr reverse recovery time i sd = 35 a, di/dt = 100a/s v dd = 20v, t j = 150c (see test circuit, figure 5) 75 ns q rr reverse recovery charge 170 nc i rrm reverse recovery current 4.5 a safe operating area thermal impedence
std35nf06 4/9 static drain-source on resistance transfer characteristics output characteristics transconductance gate charge vs gate-source voltage capacitance variations
5/9 std35nf06 source-drain diode forward characteristics normalized on resistance vs temperature normalized gate threshold voltage vs temp.
std35nf06 6/9 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
7/9 std35nf06 dim. mm inch min. typ. max. min. typ. max. a 2.20 2.40 0.087 0.094 a1 0.90 1.10 0.035 0.043 a2 0.03 0.23 0.001 0.009 b 0.64 0.90 0.025 0.035 b2 5.20 5.40 0.204 0.213 c 0.45 0.60 0.018 0.024 c2 0.48 0.60 0.019 0.024 d 6.00 6.20 0.236 0.244 e 6.40 6.60 0.252 0.260 g 4.40 4.60 0.173 0.181 h 9.35 10.10 0.368 0.398 l2 0.8 0.031 l4 0.60 1.00 0.024 0.039 v2 0 o 8 o 0 o 0 o p032p_b to-252 (dpak) mechanical data
std35nf06 8/9 tape and reel shipment (suffix t4)* tube shipment (no suffix)* dpak footprint * on sales type dim. mm inch min. max. min. max. a 330 12.992 b 1.5 0.059 c 12.8 13.2 0.504 0.520 d 20.2 0.795 g 16.4 18.4 0.645 0.724 n 50 1.968 t 22.4 0.881 base qty bulk qty 2500 2500 reel mechanical data dim. mm inch min. max. min. max. a0 6.8 7 0.267 0.275 b0 10.4 10.6 0.409 0.417 b1 12.1 0.476 d 1.5 1.6 0.059 0.063 d1 1.5 0.059 e 1.65 1.85 0.065 0.073 f 7.4 7.6 0.291 0.299 k0 2.55 2.75 0.100 0.108 p0 3.9 4.1 0.153 0.161 p1 7.9 8.1 0.311 0.319 p2 1.9 2.1 0.075 0.082 r 40 1.574 w 15.7 16.3 0.618 0.641 tape mechanical data all dimensions are in millimeters all dimensions are in millimeters
9/9 std35nf06 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsib ility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectroni cs. specifi cation mentio ned in this publication are subject to change without notice. this publication supersedes and replaces all in formation previou sly supplied. stmicroe lectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectron ics. the st logo is a trademark of stmicroelectronics ? 2000 stmicroelectronics C pr inted in italy C all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malay sia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com
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